/**
  ******************************************************************************
  * @file    lpuart.h
  * @author  hyseim software Team
  * @date    18-Aug-2023
  * @brief   This file provides all the tmp functions.
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2020 Hyseim. Co., Ltd.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file
  * in the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */


/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __LPUART_H__
#define __LPUART_H__

/* Includes ------------------------------------------------------------------*/
#include "utils.h"

#ifdef __cplusplus
 extern "C" {
#endif

/** @addtogroup IM110GW_LPUART_Driver
  * @{
  */

/** @addtogroup LPUART
  * @{
  */


/* ================================================================================ */
/* =======  Low Power Universal Asynchronous Receiver Transmitter (LPUART)  ======= */
/* ================================================================================ */
typedef struct
{
    union {
    __I  uint32_t RBR;             /*!< Receive Buffer Register,                             Address offset: 0x000 */
    __O  uint32_t THR;             /*!< Transmit Holding Register,                           Address offset: 0x000 */
    };
    __IO uint32_t LSR;             /*!< Line Status Register,                                Address offset: 0x004 */
    __IO uint32_t CTRL;            /*!< Control  Register,                                   Address offset: 0x008 */
    __IO uint32_t ISR;             /*!< Interrupt Status/Clear Register,                     Address offset: 0x00C */
    __IO uint32_t DIV;             /*!< Divisor,                                             Address offset: 0x010 */
} LPAURT_t;

#define LPUART      ((LPAURT_t*)(LPUART2_BASE))


/*------------------------------------------------------------------------------------------------------*/
/*---                 Low Power Universal Asynchronous Receiver Transmitter (LPUART)                 ---*/
/*------------------------------------------------------------------------------------------------------*/
/*******************************  Bit definition for LPUART_LSR register  *******************************/
#define LPUART_LSR_TXF              (0x1U << 0)          /*!< TX Buffer Full bit */
#define LPUART_LSR_RXF              (0x1U << 1)          /*!< RX Buffer Full bit */
#define LPUART_LSR_TXO              (0x1U << 2)          /*!< TX Overrun bit */
#define LPUART_LSR_RXO              (0x1U << 3)          /*!< RX Overrun bit */

/*******************************  Bit definition for LPUART_CTRL register  ******************************/
#define LPUART_CTRL_TXEN            (0x1U << 0)          /*!< Transmitter block enable */
#define LPUART_CTRL_RXEN            (0x1U << 1)          /*!< Receiver block enable */
#define LPUART_CTRL_TXIE            (0x1U << 2)          /*!< Transmit Completion Interrupt Enable */
#define LPUART_CTRL_RXIE            (0x1U << 3)          /*!< Receive Completion Interrupt Enable */
#define LPUART_CTRL_TXOIE           (0x1U << 4)          /*!< Transmit Overrun Interrupt Enable */
#define LPUART_CTRL_RXOIE           (0x1U << 5)          /*!< Receive Overrun Interrupt Enable */
#define LPUART_CTRL_HSTIE           (0x1U << 6)          /*!< High speed test mode Enable */

/*******************************  Bit definition for LPUART_ISR register  *******************************/
#define LPUART_ISR_TXI              (0x1U << 0)          /*!< Transmit Completion Interrupt */
#define LPUART_ISR_RXI              (0x1U << 1)          /*!< Receive Completion Interrupt  */
#define LPUART_ISR_TXOI             (0x1U << 2)          /*!< Transmit Overrun Interrupt */
#define LPUART_ISR_RXOI             (0x1U << 3)          /*!< Receive Overrun Interrupt */


/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/

/** @defgroup LPUART_Exported_Constants
  * @{
  */

#define LPUART_IT_TX            (0x01)
#define LPUART_IT_RX            (0x02)
#define LPUART_IT_TXO           (0x04)
#define LPUART_IT_RXO           (0x08)

/**
  * @}
  */

/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/

void LPUART_DeInit(void);
void LPUART_BaudrateConfig(uint32_t Div);
void LPUART_ReceiverCmd(FunctionalState_t NewState);
void LPUART_TransmitterCmd(FunctionalState_t NewState);
void LPUART_WriteData(uint16_t Data);
uint16_t LPUART_ReadData(void);
void LPUART_ITConfig(uint8_t LPUART_IT, FunctionalState_t NewState);
ITStatus_t LPUART_GetITStatus(uint8_t LPUART_IT);
void LPUART_ClearIT(uint8_t LPUART_IT);
uint32_t LPUART_GetLineStatus(void);

/**
  * @}
  */

/**
  * @}
  */

#ifdef __cplusplus
}
#endif

#endif /* __IM110GW_LPUART_H */
